1. Field of the Invention
This invention relates to the protection and recovery from errors in memory storage devices and, more particularly, to such protection and recovery in general register sets (GRS) used in instruction processors (IP).
2. Discussion of Background Art
As data processing systems become more complex and sophisticated, it is becoming even more critical to be able to detect and correct errors that may occur, particularly "soft" or temporary errors that may affect the numerous storage elements of such systems. Storage elements that need such protection and correction include large memory banks, high speed cache memories, storage registers, auxiliary memory storage elements, in fact any device which holds instructions or data needs effective data protection and correction techniques in modern computing systems.
General register sets for instruction processors are one of the key storage elements in modern computer systems that must have error detection and protection. These registers are used for different purposes. They may be used as accumulators, as index registers or as special data handlers. Partial word read and write capabilities, which necessitates segmentation of data words, are desirable, but this requires additional complexity in the design of general register sets and makes error correction and detection even more difficult. It is extremely important to protect the data in such registers and to provide for correction when errors occur. (Data as used in this document is intended to encompass binary representation of information in a broad sense to include instructions, addresses and operands.) Prior protection schemes are known which involved parity checking for error detection, but which did not allow for recovery after the errors were detected.